About VPAGE and ZX mode

Эмуляторы, поддерживающие TS-Conf

Postby chernandezba » Wed, 21.03.2018 22:40:25

Hi

I'm having problems with VPAGE register and ZX display mode.
When doing reset to 48k or 128k, the video mode is shown.
But for example, with demo pixeldemo, vpage register has value 05h, so memory address should be 05H << 14 = 14000h . But the screen really starts at 40000h. So.... what is the right value for the final video pointer?
I'm having also issues with socoban, seems the background runs with zx display mode also, but this time, the resolution is 360x288. How do I handle this?

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Postby TS-Labs » Thu, 22.03.2018 13:27:27

chernandezba wrote:But the screen really starts at 40000h

Please run the mentioned softwares with UnrealSpeccy. Enter Debugger by pressing ` key and make a screenshot of parts you are talking about. I'll be able to analyze h/w registers content to answer.
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Postby chernandezba » Thu, 22.03.2018 16:33:52

Thanks, but I see that demo loads 0 on all palette values, so this is why it fails (another bug in my core)
Anyway, can you tell me how do I show zx video modes with resolution different than 256x192? socoban does that

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Postby TS-Labs » Thu, 22.03.2018 18:37:25

chernandezba wrote:Anyway, can you tell me how do I show zx video modes with resolution different than 256x192?

It IS impossible. There's no way to display ZX mode in other resoulutions due to its addressing scheme. Addresses wrap at extra chars, so it all makes a mess on the screen.
ZX mode only supposed to work in 256x192.
chernandezba wrote:socoban does that

Are you sure of that? O_o
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Postby VBI » Thu, 22.03.2018 18:58:55

Socoban resolution: 360x288, vmode: zx (palette #0f)
video page: #20, tile0 - #10, tile1 - #14 (???), spritepage - #18
page 5:
#4000 contain level map
#4800 - next this level map ;)
#5000 - and! ...1,2,3 ... next this level map! :D
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Postby chernandezba » Thu, 22.03.2018 21:51:18

So am I right that socoban uses zx mode? I think the "diamonds" on the right (where the boxes must be moved) are drawn from the zx display mode...
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Postby chernandezba » Thu, 22.03.2018 22:43:35

Looking again at the pixel demo , seems the initial screen is moved by dma, with the following parameters:
DMA DMA source: 040000H dest: 004000H DMALen: FFH A_SZ: 1 D_ALGN: 1 S_ALGN: 0 DMACtrl: 19H DMANum: 1FH

But the vpage seems to remain at 05h, so, vram address is 05H << 14 = 14000h . But the dma operation was done to 4000h.... So, am I doing something wrong here?

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Postby TS-Labs » Fri, 23.03.2018 07:51:09

TS-Labs wrote:Please run the mentioned softwares with UnrealSpeccy. Enter Debugger by pressing ` key and make a screenshot of parts you are talking about. I'll be able to analyze h/w registers content to answer.
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Postby chernandezba » Fri, 23.03.2018 10:17:45

Thanks but my only doubts here are:
- how to draw zx display mode when size is not 256x192. I have already tested it on Unreal and it says the same as ZEsarUX: zx video mode, 360x288
- dma operations on pixel demo: they are moving between zones 40000h to 4000h and to C000h. It's curious, dma operations seems to be done at "address" mode: 4000h for typical display address on zx, and c000h for typical memory page address (and pc register is set to c000h). And like the previous issue, I have also tested on Unreal, and the debug is the same: it is using the default vpage 5. Maybe I can add to this thread to the author of the demo (AAA Band), do you know if he is in this forum and what nickname has?

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Postby chernandezba » Fri, 23.03.2018 10:23:45

VBI wrote:Socoban resolution: 360x288, vmode: zx (palette #0f)
video page: #20, tile0 - #10, tile1 - #14 (???), spritepage - #18
page 5:
#4000 contain level map
#4800 - next this level map ;)
#5000 - and! ...1,2,3 ... next this level map! :D


oh seems "aaa band" is vbi and "3asoft", and vbi is in this thread.. :) Can you help me with the dma operations on your pixeldemo? If the source code is available, I can check it by myself.... ;)
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Postby VBI » Fri, 23.03.2018 12:33:31

Hi! This is Hacker VBI from AAAband! :badtease: :lol:
loader.asm
source code
(2.51 KiB) Downloaded 73 times

page #f0 - music
pages from #10 to #ad - regular zx128 pages for all parts of demo

dma only copy next 5 pages from high mem to regular 128 memory at all, after exit from current part of demo
vpage and more - as standart zx spectrum
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Postby chernandezba » Sat, 24.03.2018 01:58:36

Thanks! I will take a look carefullly. But does it have sense what I said:
DMA DMA source: 040000H dest: 004000H DMALen: FFH A_SZ: 1 D_ALGN: 1 S_ALGN: 0 DMACtrl: 19H DMANum: 1FH
Is that dma operation correct? It's curious the destination address (4000h), it seems the zx spectrum display address (4000h) but that is a linear memory address, so 4000h means the second block of 16kb of ram, right?
And the second dma operation is done to the address C000h...
I was wondering it the dma had two modes of operation: one using linear memory address (the whole 4mb of ram) and another using only the mapped 64kb memory space, but that second mode of operation probably doesn't exist...

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Postby VBI » Sat, 24.03.2018 08:58:35

dma source / destiny adress operates in bit mask %0011 1111 1111 1110
so, #4000 == #8000 == #c000 == 0
where you see this: DMA DMA source: 040000H dest: 004000H ?
page : adress, not your internal adresses please.
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Postby TS-Labs » Sat, 24.03.2018 11:50:44

chernandezba wrote:how to draw zx display mode when size is not 256x192

Upper left part of screen is normal 256x192, the rest is a mess. Refer to US sources.
chernandezba wrote:dma operations seems to be done at "address" mode

DMA only operates in physical addresses, albeit upper part of address (registers ending with X) is a page number. This is done for convenience, since it's easier to think pages for most ZX coders. This additionally creates mess in heads, though.
Thus, two lower registers (H and L) make 14-bit lower address part. VBI tells right: mask for DMA address in registers is (X, H, L): 11111111 00111111 11111110. Two MSB zeros are from "shifting" two MSBs from H to X, when one LSB zero is because DMA operates with 16-bit words and can only address even bytes.
chernandezba wrote:Maybe I can add to this thread to the author of the demo (AAA Band)

"AAA Band" is one freak nicknamed AAA and his forum is somewhere else. VBI is the author of the loader and he put all parts of this "demo" into a single file.
chernandezba wrote:do you know if he is in this forum and what nickname has?

He is not here.
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Postby TS-Labs » Sat, 24.03.2018 11:57:26

Let me put it in other way. Imagine 4MB address as 22 bits, then:
- registers L are: 7 6 5 4 3 2 1 x (x is ignored and is always assumed 0)
- registers H are: x x 13 12 11 10 9 8 (xx are ignored totally)
- registers X are: 21 20 19 18 17 16 15 14
bits of physical address.

Again, DMA also ignores any values from PageN registers. These are for Z80 memory mapping only.
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Postby chernandezba » Sat, 24.03.2018 20:00:56

VBI wrote:dma source / destiny adress operates in bit mask %0011 1111 1111 1110
so, #4000 == #8000 == #c000 == 0
where you see this: DMA DMA source: 040000H dest: 004000H ?
page : adress, not your internal adresses please.

Where? I see it using ZEsarUX debug features
I’m talking always about linear ram addresses, source is 40000h and destination is 4000h, and that destination is strange to me... What is the destination of the first dma operation in that demo?
As I said some weeks ago, dma emulation works on almost all TSConf demos and games, but in this case, it’s not working and I don’t know why...
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Postby VBI » Sun, 25.03.2018 00:38:28

my dear chernandezba
im not send any data to #4000 with dma.
and my source illustrated it.

but, im not use your emulator to debug, sorry. may be, problem with it.
please, use current unreal to check - how data transfer.
please sorry me :)
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Postby chernandezba » Sun, 25.03.2018 21:56:04

Dear VBI :)
Thanks a lot for your explanation. I’m now sure that you are not sending data to 4000h. Can you please tell me the destination of your first dma operation? I saw your source code but I’m not sure that destination address.
ZEsarUX TSConf emulation is still experimental so it still has some bugs ;)

Regards
Cesar
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Postby VBI » Mon, 26.03.2018 10:16:36

first dma operation like this:
dma.jpg
dma.jpg (17.84 KiB) Viewed 1724 times

16kb from page #10 to #01
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Postby chernandezba » Mon, 26.03.2018 20:46:12

Ok so my calculations are correct. First destination is 01:0000, so that means page 1, offset 0, and that's linear address 4000H, just what I saw
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