Help emulating LINE interrupts

Эмуляторы, поддерживающие TS-Conf

Postby chernandezba » Fri, 16.02.2018 19:21:37

Hi

I'm trying to emulate LINE interrupts on ZEsarUX. According to the documentation, line interrupt is enabled when bit 1 of register 2AH set. It seems to be correct, as I tried the Chess demo and it seems it uses it
Then I see other three registers:

HSINT
VSINTL
VSINTH

I guess that an interrupt is fired when the scanline is at the position (VSINTL+VSINTH(bit0)) and t-states on line is HSINT. I think my guessing is right.
But, I have some questions:

-When the line interrupt is fired, do I have to call it like a IM2 interrupt? And, do I have to notify somewhere about this interrupt? I read something (translated to russian) like:
byte D [7: 0] in SD on cycle~ IORQ || ~ M1.

- $ FF - personal,
- $ FD - line,
- $ FB - DMA.
??

-Are these interrupts called even if the cpu has interrupts disabled? (DI)

I tried with the chess demo, the image is not seen well (only top half of the screen), and when I fire the interrupt, only the music goes faster, the display is wrong

Thanks
Cesar
----

ZEsarUX
ZX Second-Emulator And Released for UniX
https://github.com/chernandezba/zesarux
chernandezba
 
Posts: 136
Joined: Wed, 28.06.2017 17:50:12

Postby chernandezba » Fri, 16.02.2018 19:23:54

And... VSINTH has the bit 8 of the VSINT, but also does "Vertical INT position autoincrement". What does it mean?
----

ZEsarUX
ZX Second-Emulator And Released for UniX
https://github.com/chernandezba/zesarux
chernandezba
 
Posts: 136
Joined: Wed, 28.06.2017 17:50:12

Postby TS-Labs » Sat, 17.02.2018 05:49:06

A mi me encanta que se preocupas tan profundamente de detalles de TSconf. :)

Hay los algunos fuentes de interruptes en TSconf y cade tiene su vector. Todo que es ahi tiene significado quando IM2 modo es activo. (Cuando modo IM1 es activo solo CALL 0x38 esta hecho, sin no vector especial).
FF es frame interrupt, es uno, que es normal en Spectrum y es empezado por coincedencia de contadores de cuadro con los valores en registros VSINTx (son 9 bitos, VSINTL es 8 bajos y VSINTH es 1 mayor). Tiene la prioridad mayor.
Otro fuente es lineal y tiene vector FD y es empezado cada linea cuando contador de linea es zero.
El vector FB es empezado cuando la transaccion de DMA ha acabado. Tiene la prioridad mas baja de los todos tres.
Cado fuente puede ser mascado. Cuando es mascado con 0, es ignorado totalmente y no es procesado.
Incremento automatico es implementado en configuraciones limitados con VDAC y pueden empezar interrupt por cada 1-a, 2-a, ... 15-a linea en modo automatico.

Te prego, examina los fuentes de Unreal Speccy, donde todo es explicado consigo mismo =)
User avatar
TS-Labs
 
Posts: 5398
Joined: Thu, 26.07.2012 01:29:56

Postby chernandezba » Sat, 17.02.2018 13:40:40

Gracias por la respuesta en Español! :)

Thanks for the Spanish answer. I will take a look at the Unreal Speccy sources, I promise.
Well I have found the bug, I was using the same interrupt vector for line interrupts as for im2 interrupts XXFFH. But I see now I have to use XXFDH, so a different interrupt handler is called.
However, doing that, the demos are seen almost exactly as my previous emulation :(
I have recorded a video showing the emulator and the debug console, indicating where the line interrupts are called.

https://youtu.be/iVBFYcb44uE



Maybe I have to emulate something else more (dma?) for these demos to work

Thanks a log
----

ZEsarUX
ZX Second-Emulator And Released for UniX
https://github.com/chernandezba/zesarux
chernandezba
 
Posts: 136
Joined: Wed, 28.06.2017 17:50:12


Return to Emulators

Who is online

Users browsing this forum: No registered users and 1 guest

cron

x