TSConf ZEsarUX emulation

Эмуляторы, поддерживающие TS-Conf

Postby chernandezba » Fri, 28.07.2017 09:30:38

TS-Labs wrote:Well... May be I could help with writing some unit tests?
What I can offer are small code examples which demonstrate certain single features.


Thanks! But I don't want to bother you too much ;)
I did tried examples at
https://github.com/tslabs/zx-evo/tree/m ... s/examples

But I could only try the first one, it wrote some text using TSConf text mode, which I already had it working. Other examples involved programmable line interrupt (which I don't emulate yet) and setting 16c/256c mode and writing random pixels (and I preferred to test these modes using some non-random display)

Bomber demo wasn't working initially because I didn't paged well C000H and 0000h (ram in rom) segments. I am now forcing paging to TSConf paging mode (registers 10H-13H) and I'm not paging using typical 7ffdh port from 128k. I still don't understand when it's using TSConf paging mode or when to use 7ffdh. I do know you sent me information about it, I thought I understood, I emulated these paging modes but... it didn't work :bang:
So meanwhile I'm only doing TSConf paging mode, I have to re-read all the info you sent me and I will rewrite my code to follow all the paging modes... it's only a matter of time XD

One question I don't know since I started emulating TSConf... It supports up to 32 pages of rom (512kb) but the rom I'm using is only 64KB. So, is there any rom for TSConf larger than 64kb?

Thanks!
:beer:

Cheers
Cesar
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Postby TS-Labs » Fri, 28.07.2017 11:31:27

chernandezba wrote: I still don't understand when it's using TSConf paging mode or when to use 7ffdh.

Both paging approaches can work simultaneously, or you can think of them as of aliases.
As far as I know, all tsconf software only uses native paging registers.

chernandezba wrote:So, is there any rom for TSConf larger than 64kb?

Absolutely not. The tons of other crap belong to Baseconf.
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Postby chernandezba » Tue, 08.08.2017 13:01:52

Thanks!
How many scanlines does the tsconf have? 312? 624?
By the way, this forum seems to have been infected by a virus: going to index-emulators and clicking on page number 3 of this thread redirects me to a gambling web page :(
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Postby TS-Labs » Wed, 09.08.2017 10:41:37

320.

We are working on that fucking virus elemination...
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Postby chernandezba » Thu, 17.08.2017 10:00:03

Thanks.
Working last days on improving video display: now all video modes are drawn per scanline.
I managed also to test some demos from trd files, using trd emulation on esxdos. I've tested some text mode demos (and games) and they look great :)
Also many games using 16c and 256c video modes are not drawn well, I'm not sure if it's some bug on the .spg loading routine or they fail to some paging/video mode bug...

I'll keep you updated :)
Cheers
Cesar
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Postby chernandezba » Fri, 18.08.2017 12:51:09

Hi
Testing yesterday colour palette; I have implemented the 15-bit palette so games and demos look better :)
Some questions:

-15-bit palette is used in modes zx, 16c and 256c. But seems it is not used on text mode, is it right? I use for text mode the same speccy 16 colours
-Palette selection (register 7) is used for modes zx and 16c, but not for 256c nor text modes. Right? I suppose only the lower 4 bits of this register is used, higher bits seems to be used for sprites or tiles
-Accessing the colour palette ram (cram) can only be used with fmaps. I map it when you set register 15H with a value with bits 4-7 different from 0000. I map it write only, so you can't read it, is it right?

Thanks
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Postby TS-Labs » Fri, 18.08.2017 20:01:09

chernandezba wrote:But seems it is not used on text mode

It is used. The same as in ZX mode.
chernandezba wrote:-Palette selection (register 7) is used for modes zx and 16c, but not for 256c

Yes.
chernandezba wrote:Accessing the colour palette ram (cram) can only be used with fmaps.

Or via DMA.
chernandezba wrote: I map it when you set register 15H with a value with bits 4-7 different from 0000

Bit 4 is ENABLE bit, bits 5..7 can be any, but preferably 0, because I said so =).
chernandezba wrote: I map it write only, so you can't read it, is it right?

Yes. But writes are sent to two destinations simultaneously: to FPGA internal SRAM (which you can't read back) and to RAM which is at addresses where you map FMAPS and you can read back them (as a copy).
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Postby chernandezba » Mon, 21.08.2017 20:29:18

TS-Labs wrote:It is used. The same as in ZX mode.

Fixed. I had an error using a 8-bit colour number instead 16 ;)


Yes. But writes are sent to two destinations simultaneously: to FPGA internal SRAM (which you can't read back) and to RAM which is at addresses where you map FMAPS and you can read back them (as a copy).


So, using FMAPS:
-when a write is done, the write goes to the internal "fmaps ram", which is 1280 bytes lenght and containts the cram, sprites and ts-conf registers. Also the write goes to the usual speccy ram, so for example if I map fmaps to 4000H I will see trash on the screen
-reading from the mapped address where fmaps is, will return normal speccy ram, not internal fmaps ram, right?

Thanks
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Postby TS-Labs » Mon, 21.08.2017 23:07:11

chernandezba wrote:when a write is done, the write goes to the internal "fmaps ram", which is 1280 bytes lenght and containts the cram, sprites and ts-conf registers.

- 512 bytes CRAM
- 512 bytes Sprites
Registers are NOT in SRAM, they are spreaded among triggers.
chernandezba wrote: so for example if I map fmaps to 4000H I will see trash on the screen

If Page1 = 5.
chernandezba wrote:reading from the mapped address where fmaps is, will return normal speccy ram, not internal fmaps ram, right?

Yes.
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Postby chernandezba » Tue, 22.08.2017 13:18:51

Ok thanks. When you talk about "SRAM", what memory are you referring to? Is this SRAM not the same as the RAM seen by the Z80?
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Postby chernandezba » Tue, 22.08.2017 21:23:07

Hi
Another question... I only emulate zx mode, 16 c, 256c and text mode. But no sprites, or tiles or "raster" interrupt. So, do you know if demos and games from http://prods.tslabs.info use these tiles and sprites that I don't emulate?

I only see some images on a few demos/games, like:
-bomberman: only part of the menu "text start/options/about"
-ny17: appears only the snow man, nothing more (I think this demo uses sprites)
-chess: only the top/half part of the screen
-caleidoscope: runs perfect
-zendloops: show the girl at the beginning and pressing a key turns to black
-socoban: show the image at the beginning and pressing a key turns to black
-keftale: seems to run ok
-fire:seems to run ok

And some text demo modes seems to run ok (copter, txtdemo)
Last edited by chernandezba on Tue, 22.08.2017 21:31:41, edited 2 times in total.
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Postby g0blinish » Tue, 22.08.2017 21:29:59

ny17 uses sprites (snowflakes),tiles (bottom text) and snowman in 16c

chess uses linear interrupts. Half part of chess is "ok" for 256c mode

socoban uses tiles and sprite for player.

zen loops uses tiles
пердачок защеканца лвд после чтения моих постов..

[14:29:28] <Alone> На пентагоне картинки на бордюре рисуют. Это вообще нечестно

Теперь поезд ваш в депо, а мой локомотив мчится на укрепление демосцены спектрума.(с)Пиздунков
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Postby chernandezba » Tue, 22.08.2017 21:32:42

Thanks! I think most of them uses sprites and tiles so I won't see anything until I emulate them
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Postby WBC » Wed, 23.08.2017 10:13:19

woow, what a progress! keep it going ;)
by the way, ldi (i meanh the demo ;)) uses 16c mode only and ldd also utilizes tiles.
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я немножк упоролся с аватарой, извините (:
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Postby TS-Labs » Wed, 23.08.2017 11:34:07

chernandezba wrote:When you talk about "SRAM", what memory are you referring to?

FPGA internal memory blocks.

Raster interrupts are used heavily, so it is essential to support them.
Almost all prods use TSU (Tile Sprite Unit, hehe).
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Postby chernandezba » Wed, 23.08.2017 12:02:34

WBC wrote:woow, what a progress! keep it going ;)
by the way, ldi (i meanh the demo ;)) uses 16c mode only and ldd also utilizes tiles.


Thanks! I don't remember demo "ldi", I will check it ;)
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Postby chernandezba » Wed, 23.08.2017 12:03:49

TS-Labs wrote:
chernandezba wrote:When you talk about "SRAM", what memory are you referring to?

FPGA internal memory blocks.

Raster interrupts are used heavily, so it is essential to support them.
Almost all prods use TSU (Tile Sprite Unit, hehe).


So... where can I find information about tiles and sprites? The tsconf.xls almost say anything about it.... :(

Thanks!
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Postby VBI » Wed, 23.08.2017 12:30:18

check TSU page in xls
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Postby chernandezba » Wed, 23.08.2017 13:03:03

I already checked tsu and tsu_addr tabs in that xls, but it's a very schematic info about sprite atributes. It will be interesting to have some introduction guide to use it... ;)
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Postby VBI » Wed, 23.08.2017 13:45:04

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Postby chernandezba » Wed, 23.08.2017 14:05:37

VBI wrote:check this one and this one


Great! Thanks! These examples seem very clear. I will take a look and try to emulate them... It will take me longer than other features, it's a bit more difficult ;)

Cheers
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Postby chernandezba » Mon, 16.10.2017 23:17:56

Hi everyone
After some weeks improving different features of ZEsarUX, I’m back with the TSConf emulation
I managed to get Sprites information, as well as Sprite graphics and Tiles
I don’t draw sprites/tiles yet, but I suppose I will be able to do it on the next days :)
Cheers
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Postby TS-Labs » Tue, 17.10.2017 01:15:29

Great!
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Postby chernandezba » Tue, 17.10.2017 19:52:30

Hi

I added Tiles and Sprite emulation to ZEsarUX :)
You can see how it looks here:

https://youtu.be/SWMnRK8FPEw

On the left of the video: ZEsarUX. On the right: Unreal Speccy

The following is not emulated yet:
-dma
-scrolling
-mirroring sprite/tile
-border drawing

and probably a lot more is not emulated yet ;)
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Postby VBI » Tue, 17.10.2017 21:14:54

Superb!!
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